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A Power Efficient Neural Network Implementation on Heterogeneous FPGA and GPU Devices
Conference proceeding

A Power Efficient Neural Network Implementation on Heterogeneous FPGA and GPU Devices

Yuexuan Tu, Saad Sadiq, Yudong Tao, Mei-Ling Shyu and Shu-Ching Chen
2019 IEEE 20th International Conference on Information Reuse and Integration for Data Science (IRI), pp.193-199
2019-07

Abstract

Acceleration Computational modeling Computer architecture Field programmable gate arrays FPGA GPU Graphics processing units Heterogeneous Computing Low Powered Devices Parallel processing Real-time systems

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