SIMULATED ANNEALING AND PARALLEL PROCESSING: AN IMPLEMENTATION FOR CONSTRAINED GLOBAL DESIGN OPTIMIZATION

Journal article

Peer reviewed

MIR M ATIQULLAH and S.S RAO

Engineering optimization, Vol.32(5), pp.659-685

2000-01

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Collaboration types: Domestic collaboration
Citation topics: 4 Electrical Engineering, Electronics & Computer Science; 4.84 Supply Chain & Logistics; 4.84.169 Particle Swarm Optimization
Web Of Science research areas: Engineering, Multidisciplinary; Operations Research & Management Science
ESI research areas: Engineering

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Title: SIMULATED ANNEALING AND PARALLEL PROCESSING: AN IMPLEMENTATION FOR CONSTRAINED GLOBAL DESIGN OPTIMIZATION
Creators: MIR M ATIQULLAH
S.S RAO
Publication Details: Engineering optimization, Vol.32(5), pp.659-685
Academic Unit: College of Engineering; CoE - Mechanical & Aerospace Engineering
Language: English
Resource Type: Journal article
Record Identifier: 991031576384302976